Data processor for selecting data elements having the highest magnitude values and storing them in ascending order

ABSTRACT

A data processor for automatically selecting from a series of discrete input data elements, the elements having the N highest values and for storing the selected elements, in ascending order according to their values, one in each of N identical cells connected in cascade and wherein means are provided for causing the stored data elements to be readout as a series of a distance parallel data elements. The data proccessor can be used in a number of applications including a star censor for a satellite, or a number of vehicle control system including a visual protection sensor for automobiles and other vehicles, and vehicle tracking/steering systems, or at least partial alignment of the antenna of at least two equipment, or a telephone headset for a mobile radio system.

The invention relates to a data processor and, in particular, to anoptical data processor.

The data processor according to the invention is suitable for use in anumber of applications, for example, a star sensor for a satellite,vehicle control systems including a visual protection sensor forautomobiles and other vehicles, and vehicle tracking/steering systems,at least the partial alignment of the antenna of at least twoequipments, a telephone handset for a mobile radio system, and manyother applications that will be directly evident to persons skilled inthe art.

In all optical sensing systems the optical sensor generally producessignificantly more data than is actually required for the purposes ofevaluating the received data. For example, in a star sensor used on asatellite, the optical sensor is a charge coupled device (CCD)consisting of a two dimensional array of many thousands of individualelements or pixels, for example, an array of 250,000 to 1,000,000 sensorelements or pixels.

When such a sensor is exposed to the night sky it can see only a fewstars but in order to evaluate the data relating to the stars it isnecessary to access the data associated with all the pixels of the CCDarray. Since the number of stars is small but the number of pixels islarge the percentage of useful information is very small, i.e.approximately one in ten thousand has useful information.

In most optical sensing systems only a relatively small amount of thereceived data is likely to be of interest, in that the sensing systemwill only want to know where something is, not where it is not. In thecase of a star sensor, the only information that will be required is thelocations of the stars relative to each other.

In practice, the CCD array of a star sensor would produce approximately40 million bits of data per second of which only 1080 will containuseful data.

In order to allow a star sensor to identify the star field it isviewing, only the brightest stars can be used, and in principle onlythree stars are required in any one field of view.

Thus, the number of pixels which need to be identified is therefore only3, but due to the fact that a star image may be centered at the junctionof 4 pixels or, due to errors in focusing, may illuminate more than onepixel, the number must be increased. To ensure that the three brighteststars' position can be identified the data processor of the star sensormust return the locations of the top 30 plus pixels. This number allowsthe brightest star to illuminate one pixel and also spill over into the8 adjoining pixels such that they become the second brightest object.This is then repeated for the other 2 stars. This gives a minimum of 27pixels. Additionally the CCD array may have some blemishes, thereforesome additional pixels may be required in order to effectidentification. With known methods of data processing, it is usual toevaluate all of the data by means of a computer which is adapted to sortthrough the data in accordance with given criteria to find the relevantbits. This is either slow, or requires the use of a very powerful dataprocessor.

Known arrangements for automatically sorting and storing datawords/samples, in rank order, are described in European patentapplications, publication numbers 0 441 533 A2 and 0 413 951 A1.

In particular, EP A 0 441 533 describes apparatus for receiving andautomatically storing data words, according to magnitude, in aself-sorting register stack, wherein the stored data words aremaintained in sequential locations with data words of lesser magnitudepreceding data words of greater magnitude, wherein incoming data issimultaneously compared with each of the stored data words, and whereina new data word is automatically inserted into the correct register onthe stack, the contents of that register, and subsequent registers,being moved down one location to accommodate the new data word. Thus,with this apparatus and other known automatic data sorting and storagearrangements, the computation overhead per incoming data sample isrelatively high due, in the main, to the need for the incoming data tobe compared with each of the stored data words.

In addition, the described arrangement of EP A 0 441 533 effectivelyoperates in one clock cycle, whereas the other known arrangement,referred to above, which is a rank order processing array, and whichoperates with RAM data, does not effect operation in one clock cycle.

Furthermore, the described arrangement of EP A 0 441 533 uses a fixednumber of internal registers, or external registers, and any increase inthe number of stack registers would require an increase in the width ofthe control bits.

In addition, the described arrangement of EP A 0 441 533 effectivelyoperates in one clock cycle, whereas the other known arrangement,referred to above, which is a rank order processing array, and whichoperates with RAM data, does not effect operation in one clock cycle.

With the present invention, the number of identical cells may beincreased without increasing the size of the control system. Thedescribed embodiment of the present invention uses 16 identical cells.

Also, with the present invention, the number of comparisons per incomingdata element, for effecting the automatic selection and sorting of theincoming data, is minimized through use, at the input of the dataprocessor, of the first comparator means, and the operation is effectedin one clock cycle.

In particular, the first comparator means of the present invention areadapted to:

compare input data elements with an existing stored data element havingthe lowest value;

disregard input data elements having a value lower in rank than the saidexisting stored data element, without the need for further comparisonswith other stored data elements; and

effect the selection and storage of an input data element having a valuehigher in rank than the said existing stored data element, the selecteddata element being stored in that one of the N cells that corresponds toits position in the ascending order of element values.

The contents of the said one of the N cells, and the lower cells, aretransferred to, and stored in, an adjacent lower cell, and the dataelement stored in the lowest of the N cells is used by the firstcomparator means for comparison with subsequently received input dataelements.

The input data element may be translated into a discrete digital wordhaving one part thereof of a value indicative of the magnitude of therespective input data element and another part thereof indicative of theposition of the respective element relative to the other input dataelements.

In an alternative arrangement, each input data element may berepresentative of the intensity of light falling on a light sensor whichforms part of a two dimensional array of light sensors.

At least the N identical cells and the first comparator means may be inthe form of an integrated circuit chip, or a number of integratedcircuit chips connected in cascade. The use of cascaded integratedcircuit chips provides an ideal means for expanding the number of cellsfor the data processor, according to the invention.

The present invention may form part of a data processing system whichmay be a star sensor, or a telephone handset, or a system adapted tocontrol, and/or identify, the relative positions of at least two movingvehicles, or determine the separation distance between two movingvehicles, or a system for controlling at least two equipments, or theantenna of at least two satellite dishes.

Furthermore, the described arrangement of EP A 0 441 533 uses a fixednumber of internal registers, or external registers, and any increase inthe number of stack registers would require an increase in the width ofthe control bits.

It is an object of the present invention to provide a data processorwhich automatically selects and sorts the relevant data at the rate atwhich the data is received, for example, at the rate the data isgenerated by the charged coupled array of a star sensor, and whichminimises the number of comparisons per incoming data element foreffecting the automatic selection and sorting of the incoming data.

The invention provides a data processor for selecting from a series ofdiscrete input data elements, the elements having the N highestmagnitude values and for storing the selected elements, in ascendingorder according to their value, one in each of N identical cellsconnected in cascade, characterised in that the element having the nexthighest value is stored in first comparator means that are adapted, onreceipt of an input data element having a value higher than the value ofthe element stored therein, to generate an output for effecting storageof the said data element, according to its value, in that one of the Ncells that corresponds to its position in the ascending order of elementvalues, in that the elements of lower value in the said one of the Ncells and the lower cells are transferred to and stored in the adjacentlower cell, the element stored in the lowest of the N cells beingtransferred to the comparator means for comparison with the subsequentlyreceived input data elements, and in that means are provided for causingthe stored elements to be read out as a series of discrete dataelements.

The foregoing and other features according to the present invention willbe better understood from the following description with reference tothe accompanying drawings in which:

FIG. 1 illustrates a data processor according to the present invention;

FIG. 2 illustrates an enlarged view of part of the data processorillustrated in FIG. 1 of the drawings;

FIG. 3 illustrates a star sensor system which includes the dataprocessor illustrated in FIG. 1 of the drawings;

FIG. 4 illustrates a visual protection sensor for. automobiles and othervehicles which includes the data processor illustrated in FIG. 1 of thedrawings;

FIG. 5 illustrates one arrangement for the visual protection sensorillustrated in FIG. 4 of the drawings;

FIG. 6 illustrates a system for at least the partial alignment of atleast two equipments for the purpose of transferring informationtherebetween;

FIG. 7 illustrates, in the form of a block diagram, a data processingsystem including a data processor according to the present invention;

FIG. 8 illustrates, in the form of a block diagram, a modifiedarrangement for the data processing system according to FIG. 7;

FIG. 9 illustrates, in the form of a block diagram, another modifiedarrangement for the data processing system according to FIG. 7; and

FIG. 10 illustrates, in the form of a block diagram, a mobile telephonehandset including a data processor according to the present invention.

Referring to FIG. 1 of the drawings, the data processor according to thepresent invention, which is illustrated therein, includes an integratedcircuit chip 1 comprising 16 identical cells 1 to 16 connected incascade, the output 2 of each of the cells 2 to 16 which is a paralleldata bus, being connected to the input of the adjacent cell.

In principle, any solid state chip technology can be used to produce thechip 1, for example, SOS, CMOS, TTL, BiCMoS, or GaAs. Alternatively, thechips 1 can be fabricated using optical processing techniques.

In order to facilitate cascading of a number of chips, the output of thecell 1 is connected to output terminal pins on the chip 1 and the inputof the cell 16 is connected to input terminal pins on the chip 1.

The output 2 of the cell 1 is also connected to the input of a latch 3,the output of which is connected to an input of a comparator 4.

Each of the cells 1 to 16 is connected to an input data bus 5 and to asource of clock pulses 6 via a gating device 7. The data bus 5 is alsoconnected to an input of the comparator 4. The operation of the gatingdevice 7 and thereby the connection of the source of clock pulses 6simultaneously to the cells 1 to 16, is effected by the output 8 of thecomparator 4.

A gating device 9 which is also connected to the source of clock pulses6 via the gating device 7, is interposed between an output 10 of thecell 1 and the control input for the latch 3.

The input data bus 5 is further connected to a position counter 11 andto input and output terminal pins on the chip 1 to facilitate cascadingof a number of chips.

The input data terminals on the chip 1 are connected to an analogue todigital converter (ADC) 12 for converting each element of an analogueinput signal into an n-bit digital word which is indicative of themagnitude of the respective element of the input signal. The counter 11generates in respect of each element of the input signal a z-bit digitalword which is indicative of the position of the respective element ofthe input signal relative to the other elements and which is combinedwith the n-bit digital word to provide an n+z-bit digital word.

The cells 1 to 16 are interconnected by means of control lines 22 and 23which, as will be subsequently outlined in greater detail, provide themeans for effecting the selection and storage functions of the dataprocessor.

In one application of the data processor according to the presentinvention, the input to the ADC 12 is successively connected to theoutput of each row of a two dimensional array of light sensors. Theoutput of each row of the array is a series of discrete analogue signalelements which are each representative of the intensity of the lightfalling on the corresponding light sensor in the row.

The position counter 11 for this application is an X-Y counter, which isstepped one position in the X-direction on receipt of the output of eachrow of the array and which is stepped one position in the Y-direction onreceipt of each one of the series of discrete analogue signal elementsof the respective row of the array.

The magnitude of the light intensity can be represented by an 8-bitdigital word and the position of each of the signal elements relative tothe other elements can be represented by a 24-bit digital word, 12-bitsof the 24-bit word being indicative of the position of a row of elementsrelative to the other rows in the X-direction whilst the other 12-bitsof the 24-bit word are indicative of the position of each element of arow in the Y-direction.

The structure of the identical cells 1 to 16 of FIG. 1 of the drawing isillustrated in an enlarged view in FIG. 2 of the drawings. Asillustrated in FIG. 2 which shows three of the sixteen cells, each ofthe cells includes a data selection unit 13 the inputs of which arerespectively connected to the input data bus 5 and the data bus 2. Theoutput of the data selection unit 13 is connected to a latch 14. Theoutput of the latch 14 is connected to the input of a latch 15 and to aninput of a comparator 16, the other input of the comparator 16 beingconnected to the input data bus 5.

The connection of the source of clock pulses to each of the cells viathe gating device 7 is effected by connecting the output of the gatingdevice to an inverter 17 and to the control input of the latch 15.

The output of the invertor 17 is connected to the input of an AND gate18, the output of which is connected to the control input of the latch14. The other input of the AND gate 18 is connected to the output of anOR gate 19. The inputs of the OR gate 19 are respectively connected tothe output of an AND gate 20 and to a readout line 21 which is connectedto a supply circuit external to the chip.

Whilst the input of the AND gate 20 is shown connected via the line 22to the output of the comparator 16 of the adjacent lower cell in thecascaded series of cells 1 to 16, in practice, the AND gate 20 of eachcell will have a number of input lines 22 which are each connected to aseparate one of the outputs of the comparators of all of the lowercells. For example, the AND gate 20 of the cell 11 will have ten inputswhich are each connected to the output of the comparator 16 ofrespective ones of the cells 1 to 10. In addition, a further input ofthe AND gate 20 is connected to the output of the comparator 16 of thesame cell.

The readout line 21 is also connected to the input of an OR gate 24 theoutput of which is connected to the control input of the data selectionunit 13. The other input of the OR gate 24 is connected to the output ofan AND gate 25. The inputs to the AND gate 25 are respectively connectedto the output of the comparator 16 and the output of an OR gate 26.

Whilst the input to the OR gate 26 is shown connected via the line 23 tothe output of the comparator 16 of the adjacent higher cell in thecascaded series of cells 1 to 16, in practice, the OR gate 20 of eachcell will have a number of input lines 23 which are each connected to aseparate one of the outputs of the comparator 16 of all the highercells. For example, the OR gate 26 of the cell 11 will have five inputswhich are each connected to the output of the comparator 16 ofrespective ones of the cells 12 to 16.

All of the control lines for the cells 1 and 16 which are not connectedto an adjacent cell are connected to terminal pins on the chip 1 tofacilitate cascading of a number of chips.

On initiating the operation of the data processor illustrated in FIGS. 1and 2 of the drawings, the discrete elements of the analogue inputsignal having the sixteen highest magnitude values will be stored, inascending order according to their magnitude value, one in each of thecells 1 to 16 in a manner to be subsequently outlined, i.e. the elementhaving the highest value will be stored in cell 16 and the elementhaving the lowest value will be stored in cell 1. The element having thenext highest magnitude value will be stored in the latch 3.

On the assumption that the data processor is in a condition as isoutlined in the preceding paragraph, then the data element stored ineach of the cells, i.e. at the input of the comparator 16 of the cell,is the same value as the data element at the output of the latch 15 ofthe cell, i.e. as applied to the data selection unit 13 of the adjacentlower cell. On receipt of an input data element having a value higherthan the element stored in the latch 3, a signal will be generated atthe output 8 of the comparator 4 and will cause operation of the gatingdevice 7 and thereby the connection of the source of clock pulses 6simultaneously to the cells 1 to 16.

This new data element will be applied by means of the data bus 5 to theinput of the comparator 16 and to the input of the data selection unit13 of each of the cells 1 to 16.

On the assumption that the new data element is of a value higher thanthe data element stored in cell 12, then on the rising edge of the clockpulse, the input to the inverter 17 and to the latch 15 of each of thecells 1 to 16 will change from a logic value "0" to a logic value "1"and this will result in the input to the AND gate 18 of each cell beingat the value "0".

Since the value of the data element stored in each of the cells 1 to 12,i.e. as applied to the comparator 16, is less than the value of the newdata element, the output of the comparator 16 of each of the cells 1 to12 will change from "0" to "1". This will cause all of the inputs andthereby the output of the AND gates 20 of the cells 1 to 12 to changefrom "0" to "1". The output of the comparator 16 of the cell 13 willremain at "0", therefore, one of the inputs to the AND gate 20 of thecell 13 will remain at "0", as will the output of this AND gate 20.

Whilst the readout line 21 will be at the logic value "0", the otherinput of the OR gate 19 of each of the cells 1 to 12 will be at thelogic value "1". The output of the OR gate 19 of the cells 1 to 12 will,therefore, be at the logic value "1". However, the input of the AND gate18 will be at "0", as will be its output. The control input of the latch14 will, therefore, be at "0" and a control input of the latch 15 willchange from "0" to "1".

The outputs of the comparator 16 of each of the cells 1 to 12 will causethe input of the OR gate 26 of the cells 1 to 11 change from "0" to "1"and thereby an input to the AND gate 25 of each of the cells to changefrom "0" to "1". Since the other input of the AND gate 25 of each of thecells 1 to 11 will also have changed from "0" to "1", as a result of thechange in the output of the comparator 16, an input, and thereby theoutput, of the OR gate 24 will also change from "0" to "1". This willcause the control signal for the data selection unit 13 of each of thecells 1 to 11 to change from "0" to "1" and thereby allow the output ofthe adjacent higher cell, respectively cells 2 to 12, to be applied tothe input of the associated latch 14.

Since there is no change in the state of the output of the comparator 16of each of the cells 13 to 16, there will be no change in the state ofthe input to the gates 24 to 26 of the cells 12 to 16. Under theseconditions, the control signal for the data selection unit 13 of thecells 12 to 16 will be at the logic value "0" thereby allowing the newdata element on the input bus 5 to be applied to the input of the latch14 of each of the cells 12 to 13.

On the next falling edge of the clock pulse, the inputs to the invertor17 and latch 15 of each cell will change from "1" to "0" and the outputof the invertor 17 will change from "0" to "1". Both inputs to the ANDgates 18 of the cells 1 to 12 will, therefore, be at the logic value "1"and the output of these gates and thereby the control signal for thelatch 14 of the cells 1 to 12 will change from "0" to "1". This willeffect operation of the latch 14 of the cells 1 to 12 and allow the dataelements at the inputs of each of these latches to be transferred to theinputs of the latch 15 and the comparator 16 of the respective cells.

Thus, the new data element will be stored in the cell 12 and the dataelements at the outputs of each of the cells 2 to 12 will be transferredto the adjacent lower cell, respectively cells 1 to 11.

Since there is no change in the state of one of the inputs to the ANDgate 18, i.e. from the OR gate 19, of the cell 13 and the higher cells14 to 16, the output of these AND gates and thereby the control signalsfor the latch 14 of each of the cells 13 to 16 will remain at "0" and,therefore, data transfer will not be effected.

On the next rising edge of the clock pulse, the control signal for thelatch 15 of each of the cells 1 to 16 will change from "0" to "1" andthe latches will operate to cause the data elements at the input of thelatches to be transferred to the output of the respective cell.

This will effect a change in the outputs of the cells 1 to 12 onlybecause there has been no change in the data elements stored in thecells 13 to 16. The output of cell 1 is transferred to the latch 3 (seeFIG. 1) because the rising edge of the clock pulse and the output of thecomparator 16 of cell 1 which are both at the logic value "1", cause theoutput of the gating device 9 to change from "0" to "1" and therebyeffect operation of latch 3.

If, on the next falling edge of the clock pulse, the state of thereadout line 21 is changed from a logic "0" to a logic "1" in order toeffect readout of the data elements stored in the cells 1 to 16, thenthis will effect operation of the OR gate 19 and the AND gate 1 of eachcell 1 to 16 which, in combination with the output of the invertor 17,will cause the control input to the latch 14 to change from "0" to "1".The OR gate 24 will also operate and cause the control input of the dataselection unit 13 to change from "0" to "1" thereby causing the input ofeach of the cells to be transferred to the input of the latch 15. Thenext rising edge of the clock pulse will cause the latch 15 of each cellto operate and the stored data element to be readout and applied to theinput of the adjacent cell. This process will be repeated until all ofthe data elements have been transferred to the output of the dataprocessor, i.e. the output of the cell 1.

On completion of the readout of the contents of the cells 1 to 16, thecells will be reset by applying thereto, on the data bus 5, a datasignal of an appropriate value, for example, the value of the dataelement stored in the latch 3.

As previously stated, two or more of the chips 1 could be connected incascade in order to increase the number of cascaded cells.

A distinct advantage of the data processor according to the presentinvention which utilises a chip 1 in CMOS, is that the cells 1 to 16 areonly drawing current from the power source when an input data signalexceeds the value of the data element stored in the latch 3. This givesrise to efficient utilisation of the available power and is especiallyuseful when the power source is a battery.

It will be directly evident from the foregoing that the data processoraccording to the present invention could be used in a wide range ofapplications where the output data signals from a sensor have to beselected on the basis of their value being above a predetermined level.For example, the data processor could be used to controls and/oridentify, the relative positions of at least two moving vehicles, i.e.to control the circuits of two moving vehicles where the distancebetween the vehicles needs to be maintained at a predetermined level.Alternatively, each of the vehicles could be fitted with either twolights, or reflective, patches on an exposed surface thereof and thedata processor would be used to select the brightest points therebyenabling the position and separation distance of the vehicles to beidentified.

Thus, the data processor according to the present invention could beused as part of a visual protection sensor for automobiles and otherroad vehicles and provide an electronic buffer for such vehicles. Withthis application, the data processor according to the present inventionwould be connected to an optical sensor, for example, the optical sensorwhich is diagrammatically illustrated in FIG. 4 of the drawings andwhich consists of a light sensor 35, for example, a single row linearCCD (charge coupled device) image sensor, a filter unit 33 for, andlocated in alignment with, the light sensor 35, and a lens 34 interposedbetween the light sensor 35 and the filter unit 33.

As illustrated in FIG. 4, the sensor 35 would be fitted to the front ofa vehicle 36, in a central position, and the data processor would beadapted to read-out all the pixels of the CCD image sensor 35. Inoperation, application of the brakes by the driver of a vehicle 38,immediately in front of the vehicle 36, will cause illumination of thebrake lights 37 of the vehicle 38 and this will, in turn, causeillumination of two spots on the CCD image sensor 35. The data processorwill read-out all the pixels of the CCD image sensor 35 which, becauseof filter 33, will only have two bright points. The difference betweenthe locations of the two bright spots, i.e. their separation distance,is proportional to the distance between the two vehicles 36 and 38. andthe separation distance of the two brake lights 37. On the assumptionthat the average separation distance between the brake lights 37 of thevehicle 38 is approximately 1.2 meters, then the separation distancebetween the two bright spots can be used directly as a measure of thedistance between the vehicles 36 and 38.

The speed of the vehicle 36 which could be provided by an enginemanagement unit for the vehicle, could be used, by the visual protectionsensor of FIG. 4, to trigger a warning, either visual or audio, that theminimum distance between the vehicles 36 and 38, for the speed that theyare currently travelling, has been exceeded. If the speed of the vehicle36 is not available, then a manual system could be employed.

At night, the rear lights of the vehicle 38 will enable the visualprotection sensor of the vehicle 36 to operate in a continuous mode,monitoring the distance between the vehicles 36 and 38 but, during thedaytime, the visual protection sensor of the vehicle 36 will onlyoperate when the brakes of the vehicle 38 are applied by the driver.This is probably an acceptable situation because the most critical timeis likely to be at night.

If, however, the speed of the vehicle is available, then the visualprotection sensor could be adapted to adjust for such conditions astraffic jams etcetera during which vehicles are very much closertogether and, as a consequence of this, the vehicle speeds are almostzero.

The operation of the visual protection sensor of FIG. 4 of the drawingscould be further improved by a mandatory requirement that all roadvehicles should display a pair of lights with a specified separationdistance and either a specific color, or pattern of flashes, which thevisual protection sensor could be configured to detect. This would allowcontinuous operation, both day and night, and would remove theinaccuracies caused by varying vehicle widths.

One arrangement for the visual protection sensor of FIG. 4, which isdiagrammatically illustrated in FIG. 5 of the drawings, includes a dataprocessor 39, according to the present invention, connected to theoutput of the CCD image sensor 35 of FIG. 4 of the drawings via ananalogue to digital converter (ADC) 40 having buffer storage means forthe output of the light sensor 35. The output of the data processor 39is connected to the input of a control circuit 41, one output of whichis connected to a speaker system 42 for giving an audible warning to thedriver of the vehicle and another output of which is connected to awarning light 43 for giving a visual warning to the driver of thevehicle. The control circuit 41 is connected to the output of a readonly memory (ROM) 44 and to the vehicle speed output of an enginemanagement unit 45.

In operation, the output of the CCD image sensor 35 is applied to theADC 40 which converts it to a digital word. When all the pixels of theCCD image sensor 35 have been read out, an n-bit parallel output signalof the ADC 40 is applied to, and processed by, the data processor 39.The output of the data processor 39 is applied to the input of thecontrol circuit 41 which is adapted to use the vehicle speed output ofthe engine management unit 45 to estimate the minimum sate separationdistance from the vehicle in front and to compare this estimate with theseparation distance measured by the visual protection sensor. If theminimum separation distance between the vehicles has been exceeded, thenthe control circuit 41 is adapted to turn on the warning light 43 and,by using a digitised speech message stored in the ROM 44, effectoperation of the speaker system 42 and give a spoken warning to thedriver of the vehicle.

Another application of the data processor according to the presentinvention which is illustrated in FIG. 6 of the drawings, relates to thealignment, or partial alignment, of the antenna of at least twoequipments 46 and 47 for the purpose of transferring information betweenequipments either unidirectionally or bidirectionally.

The equipments 46 and 47 could be independently mounted either on afixed body, or a moving body.

The purpose of these applications of the data processor according to thepresent invention is to provide, via a look-up table or other storagemeans, a position reference (which could be, but is not necessarilylimited to, star sensor arrangements) for one or both equipments 46 and47 to facilitate alignment of the information transfer antenna orantennas.

The data processor could, for example, be used to align satelliteantenna with a ground station, or with at least one other satellite.

Alternatively, the data processor could be used with the satellite'sbeam former to correct for movement of the satellite and to thereby keepthe generated beam pointed in a desired direction.

With such arrangements, the satellite could be moving in a geostationaryorbit and the correction could, therefore, be used to increase the lifeof the satellite due to the fuel savings resulting from the correction.

If the satellite is in a non-geostationary orbit, then the dataprocessor could be used to aim the beam at a given area in the sky.

If the satellite is revolving and only pointing at the ground station,or another satellite, for a short period of time, then the dataprocessor could be used to correct the `pointing` of the satellite togive a longer contact time for information transfer and to therebyrecover, what might otherwise be, an out of control satellite, or toallow a better contact time, if the rotation of the satellite isintentional.

A further application of the data processor according to the presentinvention is in a star sensor on a satellite, for example, the starsensor shown in FIG. 3 of the drawings.

The star sensor according to FIG. 3 includes a CCD array 27 having alens 28 associated therewith which causes the light radiating from thenight sky to be applied to the CCD array 27.

The output from the CCD array 27 is connected to a data processor 29,according to the present invention, via an analogue to digital converter(ADC) 30 having input buffer stores for the output for the CCD array 27.

The series of discrete n-bit parallel output signals of the dataprocessor 29 which could be in the form of two 12-bit words that areeach representative of the magnitude and relative position of the outputof a pixel of the array 27, is connected to the input of a parallel toserial converter 31 having associated therewith means for identifyingthe relative positions of the data elements and means for controllingthe operation of a CCD drive circuit 32.

The drive circuit 32 causes the outputs of the rows of the CCD array 27to be successively connected to the input of the ADC 30.

The output of the converter 31 which will be a series of discrete datasignals indicative of the magnitudes of the N-highest light radiationlevels detected by the CCD array 27 and their relative positions, iscompared by means of a computer with known star data in order todetermine the positions of the located stars.

The locations of the stars in different sectors of the sky together withtheir light radiation values are known and are contained in starseparation tables. It is this data which is compared with the output ofthe converter 31 to identify the star field that is being viewed via thelens 28.

The data processor according to the present invention may be used inmany other applications and, in particular, systems of the type whichare illustrated, in the form of a block diagram, in FIG. 7 of theaccompanying drawings.

As illustrated in FIG. 7, the system comprises at least one dataprocessor 49, according to the present invention, having its inputconnected to a sensor unit 48 and its output connected to the output ofthe system via a further data processing unit 50 and an interface unit51. The operation of each element of the system is under the control ofa control unit 52. Whilst the sensor unit 48, used for any particularapplication, is dependent upon the nature of the data being processed,the main function of this unit, in association with the control unit 52,is to detect an analogue input signal and suitably convert each elementof the analogue signal into a digital word for application to the inputof the data processor unit 49. The output of the sensor unit 48, or theinput of the data processor 49 may include buffer storage means forstoring the digital word output of the sensor unit prior to itsapplication to the data processor 49. The output of the data processor49 is, in dependence upon the particular application and under thecontrol of the control unit 52, subject to any necessary furtherprocessing by the processor unit 50, and the interface unit 51 ensures,in association with the control unit 52, complete compatibility betweenthe output of the system and the input of the equipment to which thesystem output is connected. The required construction and mode ofoperation of the units 50 and 51, to suit a particular application, willbe directly evident to persons skilled in the art. Also, depending onthe nature of the parameters to be processed, it may be necessary to usemore than one of the data processors according to the present invention.

Thus, the data processing system illustrated in FIG. 7 of the drawingscould, for example, be used to co-ordinate the separation of twovehicles, where the separation distance is continuously decreases invalue until the interception of the two vehicles. With such a system,the analogue signal, at the input of the sensor unit 48, would beindicative of the position of one of the vehicles, relative to the othervehicle, and the output of the system would be applied to a guidancesystem for the vehicles and used, as appropriate, to correct anydeviation from a desired path between the two vehicles. For thisapplication, the sensor unit 48 could be an optoelectronics device andadapted to detect light reflections from either one, or both, of thevehicles. In the case of a laser guidance system for the vehicles thesensor unit 48 could be adapted to detect the light reflectionsresulting from the use of such a guidance system. Alternatively, thesensor unit could be adapted to sense the output of the vehicle'sexhaust system.

The data processing system illustrated in FIG. 7 of the drawings, couldalso form part of a guidance system for acquiring and homing upon asignal source. For this application, the sensor unit 48 would not onlybe adapted to sense the signal emanating from the source which could besound waves (for example, noise), or heat radiation (for example, from ahot spot on an object), or radio signals, but would also be adapted toprocess the collected data prior to its application to the dataprocessor unit 49, i.e. it would be necessary to interpose apre-processor unit between the units 48 and 49 which could, independence on the nature of the signal source and the collected data, beadapted to effect, for example, fast fourier transformation,correlation, signal level detection etc, of the input data. The outputof the interface unit 51 would be applied to a guidance control unit(not illustrated) to enable the guidance system to home in on the signalsource.

In a further arrangement for the data processing system of FIG. 7 of thedrawings, read/write data storage means could be included to store thecurrent state of the input data, compare the next set of data inputswith the stored data, any differences detected between the two sets ofdata being used to effect control of the necessary elements tocompensate for the difference.

A typical arrangement for the read/write data storage means isillustrated, in the form of a block diagram, in FIG. 8 of the drawings.The read/write data storage means of FIG. 8 is interposed between theunits 48 and 49 of the data processing system of FIG. 7 of the drawings,i.e. the input of a read/write data storage unit 53 is connected to theoutput of the sensor unit 48 and to one input of a subtraction circuit54, the output of which is connected to the input of the data processor49, and the output of the sensor unit 48 is connected to another inputof the subtraction circuit 54.

Thus, in operation, each frame of the digital output of the sensor unit.48 is simultaneously applied to an input of the subtraction circuit 54and to the input of the read/write data storage unit 53 where it isstored pending receipt of the next data frame. On receipt of data frame,the read/write data storage unit 53 causes a previously stored dataframe to be applied to the other input of the subtraction circuit 54,any difference between the two data frames being detected and applied tothe input of, and processed by, the data processor unit 49. The outputof the data processor unit 49 is used, in the manner outlined above, toeffect control of the necessary elements to compensate for thedifference. This method of operation, i.e. frame-by-frame, whilstsuitable for a number of applications of the data processing systemaccording to the present invention, does not take account of thecumulative effect of the changes in the input signal.

In those application where the cumulative effect of the input signalvariations is a necessary requirement, the system can be reconfigured byconnecting the input to the read/write data storage unit 53, as shown bythe dotted line 53a, to the output of the data processor unit 49 ratherthan to the output of the sensor unit 48. With this arrangement, theinput of the sensor unit. 48 is compared, in the manner outlined above,with the output of the data processor unit 49 thereby taking account ofthe cumulative effect of the input signal variations.

The interface unit 51 of the data processing system of FIG. 7 of thedrawings could be replaced by the electronic drive and control systemwhich is illustrated, in the form of a block diagram., in FIG. 9 of theaccompanying drawings. A data processing system of this type could beused, for example, to maintain the alignment of a tracking device upon atarget by manipulating the mounting points of the sensor, or as part ofa vehicle guidance system.

For the target tracking arrangement, the blocks 55 and 56 wouldrespectively be in the form of an x-axis drive unit and a y-axis driveunit for the tracking device, and the blocks 57 and 58 wouldrespectively be in the form of an x-axis actuator unit and a y-axisactuator unit for the tracking device. Thus, any detected deviation inthe alignment of the tracking device will cause the output of theprocessor unit 50 to cause, under the control of the control unit 52, anoutput signal to be applied to either the x-axis drive/actuation units55 and 57, or the y-axis drive/actuation units 56 and 58, to effect acorrective change to the alignment of the tracking device.

For the vehicle guidance system, wherein the vehicle is required tofollow a path defined by a light reflective line marked on the surfacethe road, or the like, the sensor unit 48 would be adapted to sense thelight reflected by line marking and the blocks 55 and 56 wouldrespectively be in the form of a left-hand drive unit and a right-handdrive unit for the vehicle guidance system, and the blocks 57 and 58would respectively be in the form of an left-hand actuator unit and aright-hand actuator unit for the vehicle guidance system

With this arrangement, the sensor unit 48 could include a single linearrow of charged coupled devices (CCDs) and be adapted, such that, thelight reflected by the line marking would normally causes illuminationof the CCDs located in the center of the single row, i.e. a centrallylocated band of CCDs, when the vehicle is following the correct path.Thus, any deviation from the correct path would result in the lightreflected by the line marking to illuminate at least one of the CCDs onone, or other, of the sides of the centrally located band of CCDs. Thiswould be detected by the data processor unit 49 and would result in asignal being applied, under the control of the control unit 52, toeither the left-hand, or right-hand drive/actuator units and to therebyadjust the steering of the vehicle until it is following the correctpath.

This vehicle guidance system can be used with multi-path systems whichrun adjacent to, or cross, each other, provided that each of the pathsis defined by a line marking having different light reflectiveproperties to the line markings for each of the other paths. Forexample, for a system having three paths, one of the paths could bedefined by a white line, another of the paths by a light grey line, andthe other of the paths by a dark grey line. The data processor unit 49could, in association with the control unit 52, be adapted to provideoutput signals for controlling the direction of travel of the vehiclesuch that it follow a preselected one of the multi-paths.

In mobile radio telephone systems, the radio link established between acalled party and a calling party can fade due to signal strengthvariations, or, in some instances, be totally lost. Whilst known mobiletelephone systems include means for overcoming these problems, they arenot always successful, and tend to be slow in operation.

The data processor according to the present invention can be used, in amanner which is illustrated in FIG. 10 of the accompanying drawings, aspart of a mobile telephone handset, to detect and recognise anelectromagnetic signal, and maintain reception with another party at anacceptable level. Furthermore, this method of overcoming theabove-mentioned problems of known systems, is much quicker, and moreefficient, than the known solutions.

In FIG. 10, the electronic components of the mobile telephone handsetfor determining the channel frequency for the handset are enclosed by adotted line 59 and comprise a radio frequency (rf) receiver 60, a mixercircuit 61 and a local oscillator 62 which are interconnected, andoperate, in a manner known to persons skilled in the art. The dataprocessor according to the present invention is represented by the block63, The input of the data processor 63 is connected to the output of amulti-frequency detector 64, and the output of the data processor 63 isconnected to an input of the local oscillator 62 via a control unit 65.The input of the multi-frequency detector 64 is connected to an outputof the mixer circuit 61. Thus, all of the signal channel frequencieswhich are received by the rf receiver 60, will be applied to the inputof the multi-frequency detector 63. The data processor 63 is adapted tomonitor, in a manner as previously outlined, the signal strength of eachof the received requency channels and to generate an output signal forapplication to the local oscillator 62, via the control of the controlunit 65, either to correct for any drift in the operating channelfrequency of the mobile telephone, or, in the case of unacceptablesignal strength variations, to change the operating channel frequency ofthe mobile telephone handset to a new frequency channel having a highersignal strength.

It will be seen from the foregoing that the data processor according tothe present invention can be used in many different applications, someof which have been described and others of which will be directlyevident to persons skilled in the art.

We claim:
 1. A data processor for selecting from a series of discreteinput data elements, the elements having the N highest magnitude valuesand for storing the selected elements, in ascending order according totheir value, one in each of N identical cells connected in cascade,wherein the element having the next highest value is stored in firstcomparator means that are adapted, on receipt of an input data elementhaving a value higher than the value of the element stored therein, togenerate an output for effecting storage of the said data element,according to its value, in that one of the N cells that corresponds toits position in the ascending order of element values, in that theelements of lower value in the said one of the N cells and the lowercells are transferred to and stored in the adjacent lower cell, theelement stored in the lowest of the N cells being transferred to thecomparator means for comparison with the subsequently received inputdata elements, and in that means are provided for causing the storedelements to be read out as a series of discrete data elements.
 2. A dataprocessor as claimed in claim 1 wherein the input data elements are eachtranslated into a discrete digital word having one part thereof of avalue indicative of the magnitude of the respective input data elementand another part thereof indicative of the position of the respectiveelement relative to the other input data elements.
 3. A data processoras claimed in claim 2 wherein the first comparator means include acomparator connected to the input of the data processor and to theoutput of the said lowest of the N cells via first latching means thatare adapted to store a data element for comparison with the input dataelements.
 4. A data processor as claimed in claim 1 wherein the dataprocessor includes synchronization means for generating clock pulses forcontrolling the selection and storage of the data elements in the Nidentical cells, the synchronization means being actuated by the outputof the first comparator means.
 5. A data processor as claimed in claim 4wherein the synchronization means includes first gating means for the Ncells, a source of clock pulses and second gating means for the firstcomparator means, in that the inputs of the first gating means arerespectively connected to the output of the first comparator means andthe source of clock pulses, and in that the output of the first gatingmeans is connected to each of the N cells and to the second gatingmeans.
 6. A data processor as claimed in claim 1 wherein each of the Nidentical cells includes data selection means the inputs of which arerespectively connected to the input of the data processor and the inputterminals of the cell; second latching means the input of which isconnected to the output of the data selection means; third latchingmeans the input of which is connected to the output of the secondlatching means and the output of which is connected to the outputterminals of the cell; second comparator means the inputs of which arerespectively connected to the output of the second latching means andthe input of the data processor; and control means which are responsiveto the outputs of the first and second comparator means for effectingoperation of the data selection means and the second and third latchingmeans of each of the N cells.
 7. A data processor as claimed in claim 6wherein the control means for each of the N cells includes inversionmeans the input of which is connected to the output of the first gatingmeans which is also connected to, and controls the operation of, thethird latching means; a first AND gate the inputs of which arerespectively connected to the output of the inversion means and theoutput of a first OR gate, the output of the first AND gate beingconnected to, and controls the operation of, the second latching means;a second AND gate the output of which is connected to an input of thefirst OR gate and the inputs of which are connected to the outputs ofthe second comparator means of each of the lower cells in the cascadedseries of N cells; a second OR gate the inputs of which are connected tothe outputs of the second comparator means of each of the higher cellsin the cascaded series of N cells; a third AND gate the inputs of whichare respectively connected to the output of the second OR gate and theoutput of the second comparator means; a third OR gate an input of whichis connected to the output of the third AND gate and the output of whichis connected to, and controls the operation of, the selection means; andin that the read out means are connected to an input of each of thefirst and third OR gates.
 8. A data processor as claimed in claim 1wherein the data processor includes data input means for converting eachelement of an analogue data input signal into a first digital signalhaving n-bits of information indicative of the magnitude of the respectelement of the data input signal and means for generating a seconddigital signal having z-bits of information indicative of the positionof the respective element of the data input signal relative to the otherelements, the first and second digital signals being combined to providediscrete digital words having n+z-bits of information.
 9. A dataprocessor as claimed in claim 8 wherein each element of the data inputsignal is representative of the intensity of light falling on a lightsensor which forms part a two dimensional array of light sensors.
 10. Adata processor as claimed in claim 1 wherein the data processor includesan integrated circuit chip having formed therein at least the Nidentical cells and the first comparator means.
 11. A data processor asclaimed in claim 10 wherein the data processor includes a number ofintegrated circuit chips connected in cascade.
 12. A data processor asclaimed in claim wherein the integrated circuit chips consistessentially of a material selected from the group comprising SOS, CMOS,TTL, BiCMoS and GaAs.
 13. A data processor as claimed in claim whereinthe integrated circuit chips are fabricated using an optical processingtechnique.
 14. A data processing system as claimed in claim 1 whereinthe system is adapted to control, and/or identify, the relativepositions of at least two moving vehicles.
 15. A system as claimed inclaim 14 wherein the system is adapted to determine the separationdistance between two moving vehicles.
 16. A system as claimed in claim14 wherein each of the said at least two vehicles has two light, orreflective, patches on an exposed surface thereof and in that the dataprocessor is adapted to select the brightest points and thereby effectidentification of the position and separation distance of the twovehicles.
 17. A system as claimed in claim 16 wherein each of the saidat least two vehicles includes a visual protection sensor fordetermining its separation distance from the vehicle in front and inthat the visual protection sensor comprises a light sensor fitted to thefront of a vehicle; a filter unit for the light sensor, located inalignment with the light sensor; and a lens interposed between the lightsensor and the filter unit.
 18. A system as claimed in claim 17 whereinthe light sensor is a single row of charged coupled devices adapted tobe fitted, in a central position, to the front of a vehicle.
 19. Asystem as claimed in claim 18 wherein each of the said at least twovehicles includes an analogue to digital convertor having buffer storagemeans for the output of the light sensor, the input of which isconnected to the output of the light sensor and the output of which isconnected to the input of the data processor; control means connected tothe output of the data processor for estimating the minimum safeseparation distance from the vehicle in front and for comparing thisestimate with the separation distance measured by the visual protectionsensor; and warning means connected to the output of the control meansfor giving a warning in the event that the safe minimum separationdistance has been exceeded.
 20. A system as claimed in claim 19 whereineach of the said at least two vehicles includes an engine managementunit, an engine speed output of which is connected to an input of thecontrol means and which is used to estimate the safe minimum separationdistance.
 21. A system as claimed in claim 19 wherein the warning meansinclude a visual warning for the driver of the vehicle.
 22. A system asclaimed in claim 19 wherein the warning means include an audible warningfor the driver of the vehicle.
 23. A system as claimed in claim 22wherein the warning means include a loud speaker; and a read only memoryhaving a digitized speech message stored therein, the output of the readonly memory being connected to an input of the control means and inthat, in the event that the safe minimum separation distance has beenexceeded, the output of the read only memory is connected to the loudspeaker to give a spoken warning.
 24. A system as claimed in claim 1wherein the system is adapted to control at least the partial alignmentof at least two equipments.
 25. A system as claimed in claim 24 whereinthe system is adapted to control at least the partial alignment of theantenna of at least two satellite dishes.
 26. A system as claimed inclaim 11 wherein the system includes sensor means, having an outputthereof connected to an input of the data processor, the output of saiddata processor being connected to an input of data processing means,interface means connected to the output of the data processing means,and control means for controlling the operation of the system, saidinterface means being adapted, under the control of the control means,to convert the output of the data processing means into a form which issuitable for application to the input of an equipment to which thesystem is to be connected and to thereby provide complete compatibilitybetween the system output and the equipment input.
 27. A system asclaimed in claim 26 wherein the system further includes buffer storagemeans for storing the output of the sensor means prior to itsapplication to the data processor.
 28. A system as claimed in claim 26for coordinating the separation of two vehicles where the separationdistance is continuously decreasing in value until the interception ofthe two vehicles, wherein the sensor means are adapted to sense theposition of one of the vehicles, relative to the other vehicle, in thatthe system includes a guidance system for the vehicles, and in that thesystem output is connected to the guidance system and adapted to correctany deviation from a desired path between the two vehicles.
 29. A systemas claimed in claim 28 wherein the guidance system is a laser guidancesystem and in that the sensor means include an optoelectronic device fordetecting light reflections from at least one of the vehicles.
 30. Asystem as claimed in claim 28 wherein the sensor means are adapted tosense the output of the vehicle's exhaust system.
 31. A guidance systemfor acquiring and homing in upon a signal source, wherein the guidancesystem includes a system as claimed in claim 26 additional dataprocessing means for processing the output of the sensor means prior toits application to the data processor, and guidance control meansconnected to the output of the interface means.
 32. A system as claimedin claim 31 wherein the sensor means are adapted to sense either soundwaves, or heat radiation, or radio signals.
 33. A system as claimed inclaim 32 wherein the additional data processing means are adapted toeffect either fast fourier transformation, or correlation, or signallevel detection, of the output of the sensor means.
 34. A system asclaimed in claim 26 further including read/write data storage meanswhich include a read/write storage unit, and signal subtraction meanshaving a first input connected to an output of the read/write storageunit, and a second input connected to the output of the sensing means,the output of the signal subtraction means being connected to the inputof the data processor.
 35. A system as claimed in claim 34 herein theinput of the read/write storage unit is connected to the output of thesensor means and adapted to successively read and store each frame ofthe output data of the sensor means, in that each of said data frameoutputs of the sensor means is simultaneously applied to said secondinput of the signal subtraction means, and in that, in response to thereceipt and storage of a data frame by said read/write storage unit, thepreviously store data frame is applied to said first input of the signalsubtractions means.
 36. A system as claimed in claim 34 wherein theinput of the read/write storage unit is connected to the output of thedata processor and adapted to successively read and store the dataoutput of the data processor, in that the data output of the sensormeans are applied to said second input of the signal subtraction means,and in that, in response to the receipt and storage of a data frame bysaid read/write storage unit, the previously store data frame is appliedto said first input of the signal subtractions means.
 37. A system asclaimed in claim 26 wherein said interface means include electronicdrive and control means.
 38. A system as claimed in claim 37 wherein thesystem maintains the alignment of a vehicle tracking system, in that theelectronic drive and control means include an x-axis drive unit and ay-axis drive unit for the tracking system, each of the drive units beingconnected to the output of the data processor via said data processingmeans, an x-axis actuator unit connected to the output of the x-axisdrive unit, and a y-axis actuator unit connected to the output of they-axis drive unit, and in that any detected deviation in the alignmentof the tracking system causes a signal to be applied to either thex-axis, or y-axis drive and control units to effect a corrective changeto the alignment of the tracking system.
 39. A vehicle guidance systemincluding a system as claimed in claim 37 wherein the vehicle isrequired to follow a path defined by a light reflective line marked onthe surface of a road, in that the sensor means are adapted to sense thelight reflected by said line marking, in that the electronic drive andcontrol means include left-hand and right-hand drive units for thevehicle, the inputs of which are connected to the output of the dataprocessor via said data processing means, and left-hand and right-handactuator units, the inputs of which are connected to respective ones ofthe outputs of the drive units, and in that any detected deviation fromsaid defined path causes a signal to be applied to either the left-hand,or right-hand drive and actuator units to effect a corrective change tothe steering system of the vehicle.
 40. A system as claimed in claim 39wherein the sensor means (48) include a single linear row of chargedcoupled devices, in that the light reflected by said line marking, whenthe vehicle is following the correct path, causes illumination of acentral band of the row of charge coupled devices, and in that anydeviation from the correct path causes the reflected light to illuminateat least one of the charge coupled devices on one, or other, of thesides of said central band of charge coupled devices, and thereby causesthe generation of a corrective steering signal.
 41. A system as claimedin claim 39 wherein the vehicle is adapted to follow any one of a numberof paths running adjacent to, or cross, each other, in that each of thepaths is defined by a line marking having different light reflectiveproperties to the line markings for each of the other paths, and in thatthe system is adapted to respond to the light reflections of only aselected one of the paths.
 42. A system as claimed in claim 41 whereinthe vehicle is adapted to follow any one of three paths, and in that thethree paths are respectively defined by a white line, a light gray line,and a dark gray line.
 43. A data processing system as claimed in claim 1wherein the system is a telephone handset for a mobile radio telephonesystem.
 44. A telephone handset for a mobile radio telephone system asclaimed in claim 43 wherein the handset includes means for determiningthe channel frequency for the handset comprising a radio frequencyreceiver, a mixer circuit and a local oscillator; a multi-frequencydetector having the input thereof connected to the output of the radiofrequency receiver and the output thereof connected to the input of thedata processor; and local oscillator control means having the inputthereof connected to the output of the data processor and the outputthereof connected to the input of the mixer circuit.
 45. A telephonehandset as claimed in claim 44 wherein the data processor is adapted tomonitor the signal strength of each of the received frequency channelsand to generate an output signal for application to the local oscillatorto either correct for any drift in the operating channel frequency ofthe mobile telephone, or, in the case of unacceptable signal strengthvariations, to change the operating channel frequency of the mobiletelephone handset to a new frequency channel having a higher signalstrength.
 46. A star sensor including a two dimensional array of lightsensors; a lens for the light sensor array; first means for successivelyconnecting the rows of the sensor array to the input of the dataprocessor, the output signals of each row of the sensor array being aseries of discrete signals the magnitudes of which are representative ofthe intensity of light falling on the respective ones of the lightsensors in the row; an analogue to digital converter connected to theinput of the data processor and having buffer storage means for theoutput of the light sensor array; a parallel to serial converterconnected to the output of the data processor and adapted to control theoperation of the first means; and second means connected to the outputof the parallel to serial converter for identifying the locations of thestars the light outputs of which were detected by the light sensorarray.
 47. A star sensor as claimed in claim 46 herein each of the dataelements applied to the input of the parallel to serial converter is inthe form of two 12-bit parallel words.